The invention generally relates to a system clock signal switching device which controls a plurality of clock signal generation systems to switch clock signals from one clock signal generation system to those from the other clock signal generation system. More particularly, the invention relates to a system clock signal switching device which is effectively operable, for instance, in a micro-controller having a plurality of clock signal generation systems, in such a manner that they monitor each other and that whenever one of them falls in an abnormal state, the normal clock is substituted for the abnormal one, thus enabling the device to be provided with a fail-safe function.
FIG. 4 is a diagram showing an example of a prior art oscillation circuit arrangement which has been often employed in micro-controller designs.
As shown in the figure, there are provided in the micro-controller an oscillation circuit A which generates an ordinary system clock signal CK1 and another oscillation circuit B which generates a time-count clock signal CK2 having a frequency lower than that of the clock signal CK1, and these respectively exist as an independent clock signal generation system in the micro-controller.
In such micro-controllers, it is possible to set the system in a power-down mode by supplying a power-down signal PD commanding the power-down to one of clock signal generation systems. To be more concrete, the power-down mode can be set by transmitting the power-down signal PD to the oscillation circuit A to suspend the oscillating operation thereof, and at the same time, by switching the system clock signal for the micro-controller, in the multiplexer C, from the clock signal CK1 of the oscillation circuit A to the time-count clock signal CK2 from the low frequency oscillation circuit B. With the setting of this power-down mode, the power consumption can be considerably reduced while the entire system is in the standby mode. If, however, any failure occurs in an oscillation element and/or an electrical contact of the oscillation circuit A due to some external influential factors such as external noises, there would be an abrupt, unexpected interruption of the oscillation of the clock signal CK1, which is used as the rightful system clock signal. If such accident has occurred beyond the operator's will, the entire system might be interrupted even if the micro-controller redundantly includes two oscillation circuits A and B, because it would not be possible to make use of the clock signal CK2 from the other oscillation circuit B unless the power-down command signal PD is supplied to the multiplexer C, this is a problem to be obviated from the prior art device.